辛錫進老師的著作&計畫

辛錫進 教授

期刊論文

  • Sung, Tze-Yun; Hsin, Hsi-Chin, “Reconfigurable architecture for VLSI 9/7-5/3 wavelet filter,” WSEAS Transactions on Circuits and Systems, v 9, n 5, pp. 347-357, 2010.(EI)
  • Sung, Tze-Yun ; Hsin, Hsi-Chin; Chang, Sheng-Dong, “Multiplierless, reconfigurable folded architecture for VLSI wavelet filter,” WSEAS Transactions on Circuits and Systems, v 9, n 5, pp. 358-368, 2010.(EI)
  • Sung, TY; Hsin, HC; Cheng, YP, “Low-power and high-speed CORDIC-based split-radix FFT processor for OFDM systems,” DIGITAL SIGNAL PROCESSING 20 (2), pp. 511-527, 2010.
  • Lin, SF; Hsin, HC; Su, CK, “Hybrid Image Compression Based on Set-Partitioning Embedded Block Coder and Residual Vector Quantization,” JOURNAL OF INFORMATION SCIENCE AND ENGINEERING Volume: 26 Issue: 3 , pp. 1011-1027, 2010.
  • Sung, TY; Shieh, YS; Hsin, HC, “An Efficient VLSI Linear Array for DCT/IDCT Using Subband Decomposition Algorithm,” MATHEMATICAL PROBLEMS IN ENGINEERING, 2010
  • Shieh, Yaw-Shih ; Sung, Tze-Yun; Hsin, Hsi-Chin; “A novel linear array for discrete cosine transform,” WSEAS Transactions on Circuits and Systems, v 9, n 5, pp. 335-346, 2010 (EI)
  • Hsi-Chin Hsin and Tze-Yun Sung, “Adaptive Selection and Rearrangement of Wavelet Packets for Quad-Tree Image Coding,” IEICE Trans. Fundamentals. vol. E91-A no. 9, pp. 2655-2662, 2008 (SCI) (國科會計畫編號: NSC-96-2221-E-150-074).
  • Tze-Yun Sung and Hsi-Chin Hsin, “Hybrid Image Coder Based on SPIHT Algorithm with Embedded Block Coding,” IEICE Trans. Fundamentals. vol. E90-A no. 12, pp. 2979-2984, 2007 (SCI) (國科會計畫編號: NSC-95-2221-E-239-054).
  • Tze-Yun Sung and Hsi-Chin Hsin, “An Efficient Rearrangement of Wavelet Packet Coefficients for Embedded Image Coding Based on SPIHT Algorithm,” IEICE Trans. Fundamentals. vol. E90-A no. 9, pp. 2014-2020, 2007(SCI) (國科會計畫編號: NSC-95-2221-E-239-054).
  • Tze-Yun Sung and Hsi-Chin Hsin, “Fixed-Point Error Analysis of CORDIC Arithmetic for Special-Purpose Signal Processors,” IEICE Trans. Fundamentals. vol. E90-A, pp. 2006-2013, 2007 (SCI) (國科會計畫編號: NSC-95-2221-E-239-054).
  • Tze-Yun Sung and Hsi-Chin Hsin*, “Design and Simulation of Reusable IP CORDIC Core for Special-Purpose Processors,” IET Computers & Digital Techniques, pp. 581-589, 2007 (SCI) (國科會計畫編號: NSC-95-2221-E-239-054).
  • C. K. Su, Hsi-Chin Hsin and S. F. Lin, “Wavelet Tree Classification and Hybrid Coding for Image Compression,” IEE Proc. VIS, pp. 752-756,2005 (SCI) (國科會計畫編號: NSC-94-2213- E-150-035).
  • Hsi-Chin Hsin*, “Adaptive Modulated Wavelet Subband Image Coding,” Pattern Recognition Letters, Vol. 26, pp. 809-818, 2005 (SCI) (國科會計畫編號: NSC-93-2213-E-216-007).
  • Hsi-Chin Hsin* and Ching-Chung Li, “Image Coding With Modulated Wavelets,” Pattern Recognition Letters, vol. 24, pp. 2391-2396, 2003 (SCI) (國科會計畫編號: NSC-92-2213-E- 216-013)

研討會論文

  • Tze-Yun Sung, Hsi-Chin Hsin, “A Novel Linear Array for Discrete Cosine Transform,” 9th WSEAS Int. Conference on INSTRUMENTATION, MEASUREMENT, CIRCUITS and SYSTEMS, pp.15-20, China/杭州, 2010.
  • Tze-Yun Sung, Hsi-Chin Hsin, “Reconfigurable Architecture for VLSI 9/7-5/3 Wavelet Filter,” 9th WSEAS Int. Conference on INSTRUMENTATION, MEASUREMENT, CIRCUITS and SYSTEMS, pp.15-20, China/杭州, 2010.
  • Hsi-Chin Hsin* and Tze-Yun Sung, “Image Coding with Adaptive Wavelet Packet Trees,” IMECS 2008, Hong Kong, pp. 727-731 (優秀論文獎: The Certificate of Merit).
  • Hsi-Chin Hsin*, Jenn-Jier Lien , and Tze-Yun Sung, “A Hybrid SPIHT-EBC Image Coder,” IMECS 2007, Hong Kong, pp. 1854-1857 (優秀論文獎: The Certificate of Merit).
  • Hsi-Chin Hsin* and Tze-Yun Sung, “An Efficient Rearrangement of Wavelet Packet Coefficients for Embedded Quad-Tree Image Coding,” International Conference on MULTIMEDIA SYSTEMS and SIGNAL PROCESSING, pp.82-87 (EI), 2007.
  • Tze-Yun Sung and Hsi-Chin Hsin, “VLSI Implementation of High-Performance CORDIC-Based Vector Interpolator in Power-Aware 3-D Graphic Systems,” International Conference on INSTRUMENTATION, MEASUREMENT, CIRCUITS and SYSTEMS, pp.7-12 (EI), 2007.
  • Tze-Yun Sung and Hsi-Chin Hsin, “Memory-Efficient and High-Speed Line-Based Architecture for 2-D Discrete Wavelet Transform with Lifting Scheme,” International Conference on MULTIMEDIA SYSTEMS and SIGNAL PROCESSING, pp.13-18 (EI), 2007.
  • Tze-Yun Sung and Hsi-Chin Hsin, “Numerical Accuracy and Hardware Trade-Offs for Fixed-Point CORDIC Processor for Digital Signal Processing System,” International Conference on MULTIMEDIA SYSTEMS and SIGNAL PROCESSING (MUSP’07), pp.106-111 (EI), 2007.
  • Tze-Yun Sung, Hsi-Chin Hsin, “Low-Power and High-Performance 2-D DWT and IDWT Architectures Based on 4-tap Daubechies Filters,” International Conference on MULTIMEDIA SYSTEMS and SIGNAL PROCESSING (MUSP’07), pp.50-55 (EI), 2007.
  • Tze-Yun Sung and Hsi-Chin Hsin, “Memory-Efficient and High-Performance Parallel-Pipelined Architectures for 5/3 Forward and Inverse Discrete Wavelet Transform,” International Conference on MULTIMEDIA SYSTEMS and SIGNAL PROCESSING, pp.1-6 (EI), 2007.
  • Tze-Yun Sung and Hsi-Chin Hsin, “Memory-Efficient and High-Performance 2-D DCT and IDCT Processors Based on CORDIC Rotation,” International Conf. on MULTIMEDIA SYSTEMS and SIGNAL PROCESSING, pp.7-12 (EI), 2007.
  • Tze-Yun Sung, Yaw-Shih Shieh and Hsi-Chin Hsin, “VLSI Implementation of Memory-Efficiency Multiplierless DCT and IDCT Processors,” International Workshop on Computer Architecture, VLSI, and Embedded Systems, pp.117-122 (EI), 2006.
  • Tze-Yun Sung and Hsi-Chin Hsin,”VLSI Implementation of CORDIC-Based Geometry Rotation for High-Speed 3-D Computer Graphic Systems,” International Workshop on Computer Architecture, VLSI, and Embedded Systems, pp.123-128 (EI), 2006.
  • Tze-Yun Sung and Hsi-Chin Hsin,”VLSI Implementation of CORDIC-Based Geometry Rotation for High-Speed 3-D Computer Graphic Systems,” International Workshop on Computer Architecture, VLSI, and Embedded Systems, pp.123-128 (EI), 2006.
  • Tze-Yun Sung, Mao-Jen Sun, Yaw-Shih Shieh, and Hsi-Chin Hsin, “Memory-Efficiency and High-Speed Architectures for Forward and Inverse DCT with Multiplierless Operation,” IEEE Pacific-Rim Symposium on Image and Video Technology, pp.802-811, 2006 (SCI).
  • Tze-Yun Sung, Chun-Wang Yu, Yaw-Shih Shieh, and Hsi-Chin Hsin, “Low-Power Multiplierless 2-D DWT and IDWT Architectures Using 4-tap Daubechies Filters,” The 7th International Conference on Parallel and Distributed Computing, Applications and Technologies, pp.185-190 (EI), 2006.
  • The good way to get custom writing essay custom essay writing service uk onlinebest custom essay writing service for students
    Search for your essay review custom writing services reviewsonline paper writing service reviews
    The simplest way to write my thesis statement write my essay generator onlineThe ultimate way to help me write my thesis
    Work on getting your good help writing essays for college help me write my college essayhelp writing essays for college for students
  • Tze-Yun Sung, Chun-Wang Yu, Yaw-Shih Shieh, Hsi-Chin Hsin, “A High-Efficiency Vector Interpolator Using Redundant CORDIC Arithmetic in Power-Aware 3-D Graphics Rendering,” The 7th International Conf. on Parallel and Distributed Computing, Applications and Technologies, pp.44-49 (EI), 2006.
  • Tze-Yun Sung, Chun-Wang Yu, Yaw-Shih Shieh, and Hsi-Chin Hsin, “High-Efficiency and Low-Power Architectures for 2-D DCT and IDCT Based on CORDIC Rotation,” The 7th International Conference on Parallel and Distributed Computing, Applications and Technologies, pp.191-196 (EI), 2006.
  • Tze-Yun Sung, Chun-Wang Yu, Yaw-Shih Shieh, and Hsi-Chin Hsin, “High-Speed and Low-Power Architectures for Forward and Inverse Discrete Wavelet Transform Using 4-Tap Baubechies Filters,” 9th International Conf. on Computer Science and Informatics, pp.518-521 (EI), 2006.
  • Tze-Yun Sung, Chun-Wang Yu, Yaw-Shih Shieh, and Hsi-Chin Hsin, “High-Efficient Architectures for 2-D Lifting-Based Forward and Inverse Discrete Wavelet Transform,” 9th International Conference on Computer Science and Informatics, pp.565-568 (EI), 2006.
  • Tze-Yun Sung, Chun-Wang Yu, Yaw-Shih Shieh, and Hsi-Chin Hsin, “An Efficient CORDIC-Based Vector Interpolator in Power-Aware 3-D Graphics Rendering,” 9th International Conference on Computer Science and Informatics, pp.739-742 (EI), 2006.
  • Tze-Yun Sung, Chun-Wang Yu, Yaw-Shih Shieh, and Hsi-Chin Hsin, “A High-Efficient Line-Based Architecture for 2-D Lifting-Based DWT Using 9/7 Wavelet Filters,” 9th International Conference on Computer Science and Informatics, pp.626-629 (EI), 2006.
  • Tze-Yun Sung, Chun-Wang Yu, Yaw-Shih Shieh, and Hsi-Chin Hsin, “A High-Efficient and Cost-Effective LCD Signal Processor,” 7th International Conference on Computer Vision, Pattern Recognition and Image Processing, pp.939-942 (EI), 2006.
  • Tze-Yun Sung, Chun-Wang Yu, Yaw-Shih Shieh, and Hsi-Chin Hsin, “A High-Efficient Image Scalar Algorithm for LCD Signal Processor,” 4th Symposium on Photonic, Networking and Computing, pp.1318-1321 (EI), 2006.
  • Chao-Hong Huang and Hsi-Chin Hsin, “VDSL Line Simulator,” CECA2004.
  • Chieng-Kuo Chiang and Hsi-Chin Hsin, “Digital Halftoning by Combining Error Diffusion and Ordered Dithering,” CG2003.
  • Mu-Jung Hsu, Chieng-Kuo Chiang and Hsi-Chin Hsin, “A Channelized Adaptive Modulated Wavelet Image Representation,” CG2003.

專書及專書論文

  • Wavelet-based Kalman Filtering in Scale Space for Image Fusion,” Handbook of Pattern Recognition and Computer Vision, 3rd edition, Chapter 3.7, pp. 325-345, 2005.

其他、技術報告

  • 辛錫進,以小波(封包)轉換為基礎的影像壓縮編碼研究,國科會專題計畫成果報告, 2008.
  • 辛錫進,SPIHT與混合量化之影像壓縮編碼研究,國科會專題計畫成果報告, 2007.
  • 辛錫進,一個結合SPIHT和VQ的影像壓縮編碼研究,國科會專題計畫成果報告, 2006.
  • 辛錫進,適應性調變小波子頻道影像壓縮編碼研究,國科會專題計畫成果報告, 2005.
  • 辛錫進,影像處理e化教學講義,中華大學92下學期網路教學評審優等,2004.
  • 辛錫進,以調變小波為基礎的子頻道影像編碼系統─研發與實現,國科會專題計畫成果報告,2004.
  • 辛錫進,寬頻無線區域網路之IFFT/FFT實現,中華大學重點研究計畫成果報告,2003.
  • 辛錫進,自適性調變小波轉換之影像壓縮編碼,國科會專題計畫成果報告, 2003.

We stimulate to check out http://pro-essay-writer.com/ for farther institute material.
Breathtaking company to go for http://www.writemyessay4me.org for academic use.
There is not difficult to learn smoothly using the paper writing assistance of http://writemypaper4me.org/ scripting resolution.